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Allow USB bypass large capacitance current limiter

by:SMiLer     2021-03-02
Allow USB bypass capacitance current limiter USB ( Universal serial bus) Specifications, a connection of USB device to the host or hub are given with 44 Ω parallel load is not more than 10 mu of F, it contains the stabilizer of all visible bypass capacitors by device. This limitation can be avoided when the surge current of capacitor charging device has a high pressure drop. Sometimes, bus power supply of the equipment are in need of more than 10 mu F the bypass capacitor, provide adequate storage space for current peak. The design example of circuit IC1 adopts Linear Technology company LTC6102 precision current amplifier, is used to limit surge current is set below the maximum value, the device can be used when necessary larger capacitance. LTC6102 usually is used to convert the voltage on a current detecting resistance on the output resistance to ground voltage. The device has a low bias voltage amplifier, can use low resistance measuring resistance. In general circuit structure, the output current flows through the board of the FET, FET source connected to a force with the amplifier input separated, in order to reduce go line between pin resistance problem. Figure 1, when the circuit connection and configuration after the current limits the USB device. The outputs of the circuit will be LTC6102 grounding, USES the FET on the board as a source follower, drive an external current limiting FET gate ( FIG. 1) 。 LTC6102 feedback loop to keep with the amplifier input (positive and negative Are respectively the IC1 Pin8 and Pin1) Equal to the voltage. Resistor divider will amplifier IC1 Pin8 are input in under 5 v USB voltage rail about 2 mv. At the beginning of the device to connect Q1 is shut off, amplifier IC1 Pin1 negative input is higher than the positive input, making the output of the amplifier is low. When the amplifier output low, the board FET follow pushes the Q1 grid is low, make its conduction. Current increase in Q1, until the pressure drop on the sense resistor R1 match the resistance R2 pressure drop. R3 resistance and capacitance C2 oscillation for compensation feedback loop, and reduce the conduction of Q1, to prevent the initial current peak when equipment connected to the bus. Capacitor C3 bypass a voltage regulator IC1. Resistor R7 meet FET on the IC1 biggest 1 ma allows electric current. When the grid voltage is low enough, no more than IC1 Pin7 to Pin2 is 4 v voltage input range, Q1 conduction. The circuit of USB host does not show the large capacitive load C1, but equal to R1 ( R2+R4) / R4 = 49。 8 Ω a resistive load, less than 44 largest Ω requirements. C1 after charging, low power consumption circuit continue USB device power consumption limit under maximum 100 ma. Once the configuration is complete, the equipment can be current limit maximum ascent to power equipment 500 ma, method is conduction FET Q2, make R5 and R4 in parallel, increase the voltage on the detection of resistor R1.
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